Apple
London
Working under the Analog Mixed Signal (AMS) team at Apple. Developing a tool to improve the efficiency of digital designs in FPGA synthesis.
The tool is currently deployed in experimental flows and may be extended for broader use in future. Its development and documentation are my own work, informed by ideas grounded in existing literature. Integration of the tool is a collaborative effort between myself and my team members.
SystemVerilog, formal verification, design verification, digital design, digital arithmetic, Python, C++, UVM, digital signal processing, LLMs
Communication, public speaking skills, presentation design, research skills