Cirrus Logic
Newbury
My 6-month industrial placement has been with Cirrus Logic, a semiconductor company that designs mixed-signal chips. Their products are found across smartphones, PCs, professional audio systems and more. I worked in the Newbury office in the System Emulation team. The Emulation Team builds FPGA-based prototype platforms of chips (FPGAs are programmable chips that can be configured to mimic the behaviour of a real chip before it is manufactured) to support software development, hardware verification, and testing workflows across the company. Over the placement I worked on two individual projects, both for about three months. The first tackled a bottleneck in post-silicon testing, building a lightweight system that allows engineers to test a newly manufactured chip for defects directly from their laptop instead of requiring the use of expensive production line style specialist test machines. The second is an open-ended investigation into how the analogue portions of a chip, which are computationally intensive to model, can be accurately represented within a hardware prototype platform for verification and prototyping. Both projects have given me ownership of engineering problems that matter to the business, and have exposed me to almost every stage of how a chip goes from design to production. I have presented my work at various stages, from design reviews to formal presentations and hardware demos.
I joined the Emulation Team as the sole engineer responsible for two self-contained projects, working with a day-to-day technical supervisor and a team manager. My first project addressed a practical pain point in chip testing. When a chip returns from the factory, engineers need to run structured checks that probe every digital circuit inside the chip to detect manufacturing faults (scan tests). Normally this requires booking time on expensive Automatic Test Equipment machines, which is slow and costly for an iterative bring up process. I designed a system combining an FPGA and a Python application that allows benchtop testing of silicon. Engineers can load their test files, run scan patterns on a real chip, and view results in standard formats from their workstation. The system was successfully demonstrated on real hardware and will be developed further in the future. My second project was an investigation into how analogue circuit behaviour (continuously varying electrical signals), can be represented computationally within a digital prototype platform. I evaluated various workflows and platforms for analogue emulation, focusing on optimising a software-based approach. This involved profiling C code and investigating model, code, and hardware level optimisations to improve the speed of execution. For both projects, an important part of the role was capturing the needs of the stakeholders into specific requirements to drive a 3 month package of work.
I have used skills in RTL design, testbench writing, Python development, PCB bringup, PCB debug, analogue circuit analysis, Matlab modelling, embedded C programming, optimisation and analysis of C code, and signal processing. I have also learned the basics of porting an ASIC design to FPGA, furthered my knowledge of system verilog for design and verification, and been introduced to UVM (universal verification methodology).
I have honed my skills in extracting project requirements from discussions with people from various backgrounds, and worked on communicating concepts at various levels of abstraction. I have also learned about effective project management as I have been responsible for the week by week planning of 3 month long projects. I have also improved my networking skills as I have interacted with a wide range of people from across the company. I have used my presentation skills on numerous occasions at reviews and demonstrations. I have also improved my judgement of when to ask for help vs work on a problem alone. Overall I have developed my communication, planning and problem solving skills over the course of this placement.